The standard QCA NOT gate design. | Download Scientific Diagram
All the events that take place in real time between two successive time... | Download Scientific Diagram
Conductance function (blue curve) of the device in Fig. 2 for various... | Download Scientific Diagram
shows an (n x m) single-electron memory array in which the symbol of... | Download Scientific Diagram
Simulation results for the oxidation, through a metal mask, of a... | Download Scientific Diagram
Stability plot of the single-electron SEF-gate (V 2 versus V 3 where V... | Download Scientific Diagram
a) The circuit of the electron trap, (b) the symbol of this circuit. | Download Scientific Diagram
Simulation of the QS system in synchronous mode. The initial state is:... | Download Scientific Diagram
The proposed QCA NOT gate in crossbar architecture. | Download Scientific Diagram
The majority logic QCA Gate. Using one of its inputs as a program line,... | Download Scientific Diagram
Operation of the SEF-gate. (a) Time variation of controlling input... | Download Scientific Diagram
The resulting crossbar QCA circuit corresponding to the Boolean... | Download Scientific Diagram
Circuit of the single-electron F-gate. | Download Scientific Diagram
Georgios SIRAKOULIS | ECE Department Head | Professor | Democritus University of Thrace, Komotiní | DUTH | Department of Electrical and Computer Engineering - Page 4
Standard QCA NOT gate vs our proposed QCA NOT gate.
Adiabatic clocking scheme application example on a binary wire. | Download Scientific Diagram
This circuit is part of the CA cell and is used to compute the... | Download Scientific Diagram
PDF) Design and Simulation of a Nanoelectronic Single-Electron Universal Fredkin Gate
PDF) Boolean Network Model of the Quorum Sensing Circuits.
Stability cube of the single-electron SEF-gate. Points of operation and... | Download Scientific Diagram
a) The circuit of the electron trap, (b) the symbol of this circuit. | Download Scientific Diagram
The logic circuit of the Half Adder. | Download Scientific Diagram
Input and output signals of the proposed QCA NOT gate implemented in... | Download Scientific Diagram
Cellular Automata Research Papers - Academia.edu
Ioannis KARAFYLLIDIS | Professor (Full) | Ph.D. | Democritus University of Thrace, Komotiní | DUTH | Department of Electrical and Computer Engineering
PDF) Developer temperature effect on negative deep ultraviolet resists: Characterization, modeling, and simulation | Prof. Ioannis Karafyllidis - Academia.edu
